职位 | 地点 | 专业要求 | 岗位职责 |
ASIC Design Verification Engineer | 上海 | EE, CS, or | • Good understanding on ASIC design verification flow • Programming knowledge on Verilog/SystemVerilog, C/C++ • Knowledge on Perforce, OVL, SVA, SV, UVM, script programming etc. |
ASIC Front-End Design Engineer | 上海 | EE, CS, or | • Develop RTL code for Block / IP or SoC top level • Working with project lead to define FEINT flow setting, including synthesis, equivalence check flow. Define frequency target, power strategy and etc. • Regular run FEINT flow, check quality, drive/co-work IP team on issue solving and QoR improvement. • Work very closely with physical design engineers to help on floorplan, timing closure, power design validation and etc. |
Physical Design Engineer | 上海 | EE, CS, or | • Familiar with general IC design flow, familiar with physical design flow and EDA tool (Synopsys or Cadence) is a plus. • Familiar with Linux, skill in scripts including perl/tcl/cshell/python is a plus. • Good communication skills, proactive and team work. |
ASIC Design methodology Engineer | 上海 | EE, CS, or | • Participate in the design and implementation of the leading edge, front-end or back-end ASIC design flow which covers from logical design to physical implementation (synthesis, place and route etc) • Be familiar with Linux working environment • Experience in program with one or more languages (CShell, TCL, Perl or python etc.) is a plus |
DFT Design Engineer | 上海 | EE, CS, or | • Implement DFT features including SCAN, Boundary SCAN, MBIST, Analog Macro test logic and etc. • Participate in ATE bring-up and debug the DFT patterns on ATE. |
Senior Software Development Engineer | 上海 | EE, CS, SW, or | • Work as part of the global Software Customer Support engineering team to design and maintain the graphics device driver and other software components • Specify, design, and implement new ASIC and software features |
Graphics Driver Engineer | 上海 | EE, CS, SW, or | • Design, develop and debug kernel mode driver, ISP driver, graphics driver, including DirectX/OpenGL/Vulkan drivers. • Work on supporting next generation Microsoft Windows, Linux and Virtualization operation system • Work on bring up and support AMD next generation APU/GPU |
System Software Engineer | 上海 | EE, CS, SW, or | • Design, develop, and debug BIOS (System Software) or UEFI Firmware for internal/external systems and platforms that use AMD APU/CPU, AMD chipset, and 3rd party chipsets. • Participant in day-to-day BIOS development work using PC assembly and C languages; will need to interact with internal organizations and customers. • Comfortable working with PC hardware and platform issues |
Systems Design Engineer – Debug Engineer | 上海 | EE, CS, or | • Support new product bring-up and debug • Create test procedures and generate technical documents as needed. |
Systems Design Engineer – IPSE Engineer | 上海 | EE, CS, or | • Work closely with IP design team to define IP validation test plan for both pre-silicon (emulation) and post-silicon • Lead ASIC/ IP feature bring-up and validation, ensure coverage and schedule will meet silicon tape-out date • Drive cross-team (ASIC design, platform, driver) collaboration to enable IP features and optimize performance |
Graphic Performance Verification and Analysis | 上海 | EE, CS, or | • Co-Work with World Wide Performance Verification and Design Team • Initiate and Lead Research on GPU architect • Write performance analysis tools • Familiar with Graphics Algorithm/Graphics Pipeline |
Graphics and parallel computing software architect | 上海 | EE, CS, or | • Co-Work with World Wide Performance analysis and Design Team • Development experience with device drivers or compiler(graphics, networking) |
城市 | 高校 | 宣讲日期 | 宣讲时间 | 宣讲场地 | |
上海 | 复旦大学 | 10月17日 | 18:30-21:00 | 行政楼106报告厅(张江校区) | |
上海 | 上海交通大学 | 10月18日 | 18:45-21:15 | 铁生馆100 | |
上海 | 上海科技大学 | 10月26日 | 18:00-20:30 | 信息学院1号楼A区-200演讲厅 | |
杭州 | 浙江大学 | 11月3日 | 18:00-20:30 | 玉泉校区永谦活动中心二楼排练厅 |
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